1. Technical Field
A semiconductor memory device and, more specifically, a method for fabricating a pad by using a self align contact (SAC) are disclosed.
2. Description of the Related Art
In a semiconductor device, a self align contact(SAC) pad plays a role of electrically connecting a conductive area of a substrate such a source/drain junction with a bottom electrode or a bit line.
As modem semiconductor devices require a very thin line width being thinner than 100 nm, a photolithography process employing fluoride argon(ArF) furnace light source has been introduced.
FIG. 1 is a scanning electron microscopy(SEM) photography illustrating the pattern of the semiconductor device formed by an ArF photolithography process.
Referring to FIG. 1, a plurality of isolated patterns is disposed at a predetermined interval. In an ArF type photoresist, for example, cycloolefin-maleic anhydride(COMA) or acrylates have very poor etch resistance to fluoride gas during the SAC etching, thereby causing the distortion of patterns represented by a reference numeral ‘10’ in the photograph.
In order to prevent such distortions of the patterns 10, a hard mask such as a poly silicon layer or a silicon nitride layer is utilized on the insulator layer such as an oxide layer when the contact hole pattern is formed. In this case, the photo resist pattern is used as an etching mask for patterning only the hard mask.
FIG. 2 is a scanning electron microscopy(SEM) photograph illustrating a top and a cross sectional view of the semiconductor device formed a contact pad thereon.
Referring to FIG. 2, a plurality of gate electrode patterns 20 in the form of a line is displaced and a plurality of contact pads 21 is formed between the gate electrode patterns 20.
Meanwhile, in a conventional method for implementing a SAC etching process by using a hard mask, in case when the hard mask is not removed before the deposition of a conductive material for forming the contact hole, an under cut occurs, when a poly silicon is utilized as a contact pad conductive material. The indirect will occur after the SAC etching an opening portion is expanded by a wet etching due to the hard mask or a cleaning process is performed before the deposition of the contact pad conductive material. Also, a void or a seam 22 occurs during the deposition of the conductive material such as a polysilicon. Also, a lifting of the hard mask occurs during the cleaning process.
On the other hand, after the forming of the SAC is performed, a selective epitaxial growth (SEG) method has been actively developed as a method for forming the contact pad. If the contact pad is formed by the SEG method, it has the benefit of reducing the contact resistance by 1˜2 times in a technology having a line width below 0.1 μm in comparison with forming the contact pad by using a conventional poly silicon deposition.
FIGS. 3A and 3B are graphs representing a cell resistance between a contact pad formed by using the SEG method and a contact pad formed by using a poly silicon deposition.
FIG. 3A graphically illustrates the cell resistance (kΩ/Tr) versus the size of probability to be accumulated. Referring to FIG. 3A, the pad (A) formed by using the SEG method primarily exists below the cell resistance of 20 (kΩ/Tr). In contrast, the pad (B) formed by using a conventional poly silicon deposition method does not exist below the cell resistance of 20 (kΩ/Tr) but primarily exits the region between the cell resistance of 20 (kΩ/Tr) and the cell resistance of 20 (kΩ/Tr).
And also, FIG. 3B graphically illustrates the changes of the cell resistance (kΩ/Tr) versus the area of contact opening(μm2). Referring to FIG. 3B, if pad (A) is formed by using the SEG method and pad (B) is formed by using a conventional poly silicon deposition method, they have the same contact opening area and the cell resistance (kΩ/Tr) of pad (A) formed by using the SEG method appears at the bottom of the drawing in comparison with the cell resistance (kΩ/Tr) of the pad (B) formed by using a conventional poly silicon deposition method, thereby resulting the cell resistance of pad (A) being smaller than the cell resistance pad (B).
FIG. 4 is a SEM photograph depicting an abnormal silicon growth during a pad is formed by using the SEG method.
Referring to FIG. 4, since the thin film formed by using the SEG method causes an irregular silicon growth during the growing process, a device defect occurs such as a silicon cluster. The reference numeral ‘40’ represents a lump of silicon created by breaking the selectivity during the SEG growth. Such silicon lump 40 is a source of defect during subsequent processes, thereby causing the failure of device.
In addition, a silicon epitaxial layer grown by the SEG method has a problem of overgrowth of the SEG in the top portion of the hard mask when the hard mask is a polysilicon disposed on the insulating layer such as an oxide layer. The epitaxial layer has a tendency to grow in an angled shape such as a facet and causes a void in the insulating layer during the subsequent forming of the insulating layer.
Therefore, when the contact pad is formed by using the SEG method, a process is needed for protecting against an irregular silicon growth in the contact pad.